PCIe Design Verification Engineer

Job title:

PCIe Design Verification Engineer

Company

Advanced Micro Devices

Job description

Job Description:WHAT YOU DO AT AMD CHANGES EVERYTHINGWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.AMD together we advance_THE ROLE:AMD is looking for an experienced Design Verification Engineer willing to take on the challenge of verifying a part of the PCIe Controller Design. In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering AI Infrastructure, Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team is responsible for the Verification of several critical PCIe components as well as the integration of lower level IPs and delivery to SoC. You will work on verifying a balanced architecture between power consumption and performance, delivering high complexity RTL code and Verification components, as well as creating advanced testbenches using leading-edge verification techniques.THE PERSON:You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.KEY RESPONSIBILITIES:

• Work with high-speed, low power digital circuit designs from definition to implementation
• Verification of critical high speed digital designs using both coverage driven random and directed testing techniques as well as Formal verification.
• Own some or all aspects of the Verification flow from initial test planning to coverage convergence and sign-off closure for one or more features and aspects of Sub-System level IP interoperability.
• Building testbench components as well as developing test and sequence libraries, by applying Objected Oriented Programming Verification techniques following UVM methodology.

PREFERRED EXPERIENCE:

• Strong background in ASIC Design Flow
• Expertise in Design Verification
• Proficient in SystemVerilog and scripting languages like Python, Perl, Ruby, Makefile, shell
• Experience verifying complex designs using UVM, OVM or VMM
• Proficient in debugging firmware and RTL code using simulation tools
• Automating workflows in a distributed compute environment.
• Familiarity with industry standard high-speed protocols such as PCIe, SATA, USB or Ethernet
• Experience with verification of Hardware-Firmware interaction is highly desirable
• Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
• Strong analytical and problem solving skills with pronounced attention to detail
• Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in Computer/Electrical Engineering

#LI-RD1Benefits offered are described: .AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Expected salary

Location

Vancouver, BC

Job date

Fri, 29 Nov 2024 04:48:15 GMT

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